]> Nutra Git (v1) - gamesguru/feather.git/commitdiff
guix: use gcc 12.3.0 for linux, windows targets
authortobtoht <tob@featherwallet.org>
Mon, 18 Mar 2024 12:10:30 +0000 (13:10 +0100)
committertobtoht <tob@featherwallet.org>
Mon, 18 Mar 2024 12:10:30 +0000 (13:10 +0100)
contrib/guix/manifest.scm
contrib/guix/patches/vmov-alignment.patch

index b1b5836c9e655d9dd3aff1f9cc627cc92abc556d..17948de2966617b6e3d1f7388e62e429a53d1823 100644 (file)
@@ -97,7 +97,7 @@ chain for " target " development."))
       (home-page (package-home-page xgcc))
       (license (package-license xgcc)))))
 
-(define base-gcc gcc-10)
+(define base-gcc gcc-12)
 (define base-linux-kernel-headers linux-libre-headers-6.1)
 
 (define* (make-bitcoin-cross-toolchain target
@@ -291,9 +291,6 @@ chain for " target " development."))
         meson
         ninja
         zig
-        ;; Native GCC 10 toolchain
-        gcc-toolchain-10
-        (list gcc-toolchain-10 "static")
         ;; Scripting
         perl
         python-minimal
@@ -310,10 +307,21 @@ chain for " target " development."))
   (let ((target (getenv "HOST")))
     (cond ((string-suffix? "-mingw32" target)
            ;; Windows
-           (list (make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
-                 nsis-x86_64))
+           (list
+             gcc-toolchain-12
+             (list gcc-toolchain-12 "static")
+             (make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
+             nsis-x86_64))
           ((string-contains target "-linux-")
-           (list (make-bitcoin-cross-toolchain target)))
+           (list
+             gcc-toolchain-12
+             (list gcc-toolchain-12 "static")
+             (make-bitcoin-cross-toolchain target)))
           ((string-contains target "darwin")
-           (list clang-toolchain-10 binutils ldid))
+           (list
+             gcc-toolchain-10
+             (list gcc-toolchain-10 "static")
+             binutils
+             clang-toolchain-10
+             ldid))
           (else '())))))
index 072f76eafd38f044eb1dcef3613c147c4f79b0a8..96e1cb7cd19f1eaec29535d8b9c825f2721ca974 100644 (file)
@@ -1,6 +1,7 @@
 Description: Use unaligned VMOV instructions
 Author: Stephen Kitt <skitt@debian.org>
 Bug-Debian: https://bugs.debian.org/939559
+See also: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54412
 
 Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
 
@@ -167,14 +168,19 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
        default:
          gcc_unreachable ();
        }
---- a/gcc/config/i386/i386.c
-+++ b/gcc/config/i386/i386.c
-@@ -4981,13 +4981,13 @@
-       switch (type)
+--- a/gcc/config/i386/i386.cc
++++ b/gcc/config/i386/i386.cc
+@@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size,
        {
        case opcode_int:
--        opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
-+        opcode = "vmovdqu32";
+         if (scalar_mode == E_HFmode)
+-          opcode = (misaligned_p
+-                    ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64")
+-                    : "vmovdqa64");
++          opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
+         else
+-          opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
++          opcode = "vmovdqu32";
          break;
        case opcode_float:
 -        opcode = misaligned_p ? "vmovups" : "vmovaps";
@@ -186,9 +192,24 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
          break;
        }
      }
-@@ -4996,16 +4996,16 @@
-       switch (scalar_mode)
+@@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size,
        {
+       case E_HFmode:
+         if (evex_reg_p)
+-          opcode = (misaligned_p
+-                    ? (TARGET_AVX512BW
+-                       ? "vmovdqu16"
+-                       : "vmovdqu64")
+-                    : "vmovdqa64");
++          opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
+         else
+-          opcode = (misaligned_p
+-                    ? (TARGET_AVX512BW
+-                       ? "vmovdqu16"
+-                       : "%vmovdqu")
+-                    : "%vmovdqa");
++          opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
+         break;
        case E_SFmode:
 -        opcode = misaligned_p ? "%vmovups" : "%vmovaps";
 +        opcode = "%vmovups";
@@ -207,7 +228,7 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
          break;
        default:
          gcc_unreachable ();
-@@ -5017,48 +5017,32 @@
+@@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size,
        {
        case E_QImode:
          if (evex_reg_p)