guix: use gcc 13.3.0

diff --git a/contrib/depends/packages/native_qt.mk b/contrib/depends/packages/native_qt.mk
index 89164040253b4058625b76384c37a07cf8def4cc..261fc5a2459afb3929d4573a99ccda7b72f78c49 100644 (file)
--- a/contrib/depends/packages/native_qt.mk
+++ b/contrib/depends/packages/native_qt.mk
@@ -118,6 +118,9 @@ $(package)_config_opts += -no-zstd
 ifneq ($(LTO),)
 $(package)_config_opts += -ltcg
 endif
+
+$(package)_config_env := CC="$$($(package)_cc)"
+$(package)_config_env += CXX="$$($(package)_cxx)"
 endef
 
 define $(package)_fetch_cmds

diff --git a/contrib/guix/libexec/build.sh b/contrib/guix/libexec/build.sh
index 3c5182e6ee76099093e9870bb7cf1386a08795fb..94a434122b5b7ea7b77cc48cd6118e104ef1cf0a 100755 (executable)
--- a/contrib/guix/libexec/build.sh
+++ b/contrib/guix/libexec/build.sh
@@ -217,7 +217,9 @@ make -C contrib/depends --jobs="$JOBS" HOST="$HOST" \
                                    x86_64_linux_RANLIB=x86_64-linux-gnu-gcc-ranlib \
                                    x86_64_linux_NM=x86_64-linux-gnu-gcc-nm \
                                    x86_64_linux_STRIP=x86_64-linux-gnu-strip \
-                                   guix_ldflags="$HOST_LDFLAGS"
+                                   guix_ldflags="$HOST_LDFLAGS" \
+                                   build_CC="${NATIVE_GCC}/bin/gcc -isystem ${NATIVE_GCC}/include" \
+                                   build_CXX="${NATIVE_GCC}/bin/g++ -isystem ${NATIVE_GCC}/include/c++ -isystem ${NATIVE_GCC}/include"
 
 # Log the depends package hashes
 DEPENDS_PACKAGES="$(make -C contrib/depends --no-print-directory HOST="$HOST" print-all_packages)"

diff --git a/contrib/guix/manifest.scm b/contrib/guix/manifest.scm
index b9f29112657bd23be1251e05e33fee1f22a8f552..6e88106f22d5bc392dbed2e4dd42403ffebc27d7 100644 (file)
--- a/contrib/guix/manifest.scm
+++ b/contrib/guix/manifest.scm
@@ -101,7 +101,7 @@ chain for " target " development."))
       (home-page (package-home-page xgcc))
       (license (package-license xgcc)))))
 
-(define base-gcc gcc-12)
+(define base-gcc gcc-13)
 (define base-linux-kernel-headers linux-libre-headers-6.1)
 
 (define* (make-bitcoin-cross-toolchain target
@@ -120,8 +120,11 @@ desirable for building Feather Wallet release binaries."
 
 (define (gcc-mingw-patches gcc)
   (package-with-extra-patches gcc
-    (search-our-patches "gcc-remap-guix-store.patch"
-                        "vmov-alignment.patch")))
+    (search-our-patches "gcc-remap-guix-store.patch")))
+
+(define (binutils-mingw-patches binutils)
+  (package-with-extra-patches binutils
+    (search-our-patches "binutils-unaligned-default.patch")))
 
 (define (winpthreads-patches mingw-w64-x86_64-winpthreads)
   (package-with-extra-patches mingw-w64-x86_64-winpthreads
@@ -129,7 +132,7 @@ desirable for building Feather Wallet release binaries."
 
 (define (make-mingw-pthreads-cross-toolchain target)
   "Create a cross-compilation toolchain package for TARGET"
-  (let* ((xbinutils (cross-binutils target))
+  (let* ((xbinutils (binutils-mingw-patches (cross-binutils target)))
          (machine (substring target 0 (string-index target #\-)))
          (pthreads-xlibc (winpthreads-patches (make-mingw-w64 machine
                                          #:xgcc (cross-gcc target #:xgcc (gcc-mingw-patches base-gcc))
@@ -473,6 +476,8 @@ inspecting signatures in Mach-O binaries.")
         zip  ; used to create release archives
 
         ;; Build tools
+        gcc-toolchain-13
+        (list gcc-toolchain-13 "static")
         gnu-make
         pkg-config
         bison ; used to build libxkbcommon in depends
@@ -492,16 +497,12 @@ inspecting signatures in Mach-O binaries.")
     (cond ((string-contains target "-mingw32")
            ;; Windows
            (list
-             gcc-toolchain-12
-             (list gcc-toolchain-12 "static")
              (make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
              nsis-x86_64
              nss-certs
              osslsigncode))
           ((string-contains target "-linux-")
            (list
-             gcc-toolchain-12
-             (list gcc-toolchain-12 "static")
              (make-bitcoin-cross-toolchain target)
              squashfs-tools
              gperf ;; used to build eudev in depends
@@ -509,8 +510,6 @@ inspecting signatures in Mach-O binaries.")
           ))
           ((string-contains target "darwin")
            (list
-             gcc-toolchain-11
-             (list gcc-toolchain-11 "static")
              clang-toolchain-18
              lld-18
              (make-lld-wrapper lld-18 #:lld-as-ld? #t)

diff --git a/contrib/guix/patches/binutils-unaligned-default.patch b/contrib/guix/patches/binutils-unaligned-default.patch
new file mode 100644 (file)
index 0000000..d1bc71a
--- /dev/null
+++ b/contrib/guix/patches/binutils-unaligned-default.patch
@@ -0,0 +1,22 @@
+commit 6537181f59ed186a341db621812a6bc35e22eaf6
+Author: fanquake <fanquake@gmail.com>
+Date:   Wed Apr 10 12:15:52 2024 +0200
+
+    build: turn on -muse-unaligned-vector-move by default
+
+    This allows us to avoid (more invasively) patching GCC, to avoid
+    unaligned instruction use.
+
+diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
+index e0632681477..14a9653abdf 100644
+--- a/gas/config/tc-i386.c
++++ b/gas/config/tc-i386.c
+@@ -801,7 +801,7 @@ static unsigned int no_cond_jump_promotion = 0;
+ static unsigned int sse2avx;
+ 
+ /* Encode aligned vector move as unaligned vector move.  */
+-static unsigned int use_unaligned_vector_move;
++static unsigned int use_unaligned_vector_move = 1;
+ 
+ /* Encode scalar AVX instructions with specific vector length.  */
+ static enum

diff --git a/contrib/guix/patches/vmov-alignment.patch b/contrib/guix/patches/vmov-alignment.patch
deleted file mode 100644 (file)
index 96e1cb7..0000000
--- a/contrib/guix/patches/vmov-alignment.patch
+++ /dev/null
@@ -1,288 +0,0 @@
-Description: Use unaligned VMOV instructions
-Author: Stephen Kitt <skitt@debian.org>
-Bug-Debian: https://bugs.debian.org/939559
-See also: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54412
-
-Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
-
---- a/gcc/config/i386/sse.md
-+++ b/gcc/config/i386/sse.md
-@@ -1058,17 +1058,11 @@
- {
-   if (FLOAT_MODE_P (GET_MODE_INNER (<MODE>mode)))
-     {
--      if (misaligned_operand (operands[1], <MODE>mode))
--      return "vmovu<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
--      else
--      return "vmova<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
-+      return "vmovu<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
-     }
-   else
-     {
--      if (misaligned_operand (operands[1], <MODE>mode))
--      return "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
--      else
--      return "vmovdqa<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
-+      return "vmovdqu<ssescalarsize>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}";
-     }
- }
-   [(set_attr "type" "ssemov")
-@@ -1184,17 +1178,11 @@
- {
-   if (FLOAT_MODE_P (GET_MODE_INNER (<MODE>mode)))
-     {
--      if (misaligned_operand (operands[0], <MODE>mode))
--      return "vmovu<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
--      else
--      return "vmova<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
-+      return "vmovu<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
-     }
-   else
-     {
--      if (misaligned_operand (operands[0], <MODE>mode))
--      return "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
--      else
--      return "vmovdqa<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
-+      return "vmovdqu<ssescalarsize>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
-     }
- }
-   [(set_attr "type" "ssemov")
-@@ -7806,7 +7794,7 @@
-   "TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-   "@
-    %vmovlps\t{%1, %0|%q0, %1}
--   %vmovaps\t{%1, %0|%0, %1}
-+   %vmovups\t{%1, %0|%0, %1}
-    %vmovlps\t{%1, %d0|%d0, %q1}"
-   [(set_attr "type" "ssemov")
-    (set_attr "prefix" "maybe_vex")
-@@ -13997,29 +13985,15 @@
-   switch (<MODE>mode)
-     {
-     case E_V8DFmode:
--      if (misaligned_operand (operands[2], <ssequartermode>mode))
--      return "vmovupd\t{%2, %x0|%x0, %2}";
--      else
--      return "vmovapd\t{%2, %x0|%x0, %2}";
-+      return "vmovupd\t{%2, %x0|%x0, %2}";
-     case E_V16SFmode:
--      if (misaligned_operand (operands[2], <ssequartermode>mode))
--      return "vmovups\t{%2, %x0|%x0, %2}";
--      else
--      return "vmovaps\t{%2, %x0|%x0, %2}";
-+      return "vmovups\t{%2, %x0|%x0, %2}";
-     case E_V8DImode:
--      if (misaligned_operand (operands[2], <ssequartermode>mode))
--      return which_alternative == 2 ? "vmovdqu64\t{%2, %x0|%x0, %2}"
-+      return which_alternative == 2 ? "vmovdqu64\t{%2, %x0|%x0, %2}"
-                                     : "vmovdqu\t{%2, %x0|%x0, %2}";
--      else
--      return which_alternative == 2 ? "vmovdqa64\t{%2, %x0|%x0, %2}"
--                                    : "vmovdqa\t{%2, %x0|%x0, %2}";
-     case E_V16SImode:
--      if (misaligned_operand (operands[2], <ssequartermode>mode))
--      return which_alternative == 2 ? "vmovdqu32\t{%2, %x0|%x0, %2}"
-+      return which_alternative == 2 ? "vmovdqu32\t{%2, %x0|%x0, %2}"
-                                     : "vmovdqu\t{%2, %x0|%x0, %2}";
--      else
--      return which_alternative == 2 ? "vmovdqa32\t{%2, %x0|%x0, %2}"
--                                    : "vmovdqa\t{%2, %x0|%x0, %2}";
-     default:
-       gcc_unreachable ();
-     }
-@@ -21225,63 +21199,27 @@
-       switch (get_attr_mode (insn))
-       {
-       case MODE_V16SF:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          return "vmovups\t{%1, %t0|%t0, %1}";
--        else
--          return "vmovaps\t{%1, %t0|%t0, %1}";
-+        return "vmovups\t{%1, %t0|%t0, %1}";
-       case MODE_V8DF:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          return "vmovupd\t{%1, %t0|%t0, %1}";
--        else
--          return "vmovapd\t{%1, %t0|%t0, %1}";
-+        return "vmovupd\t{%1, %t0|%t0, %1}";
-       case MODE_V8SF:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          return "vmovups\t{%1, %x0|%x0, %1}";
--        else
--          return "vmovaps\t{%1, %x0|%x0, %1}";
-+        return "vmovups\t{%1, %x0|%x0, %1}";
-       case MODE_V4DF:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          return "vmovupd\t{%1, %x0|%x0, %1}";
--        else
--          return "vmovapd\t{%1, %x0|%x0, %1}";
-+        return "vmovupd\t{%1, %x0|%x0, %1}";
-       case MODE_XI:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          {
--            if (which_alternative == 2)
--              return "vmovdqu\t{%1, %t0|%t0, %1}";
--            else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
--              return "vmovdqu64\t{%1, %t0|%t0, %1}";
--            else
--              return "vmovdqu32\t{%1, %t0|%t0, %1}";
--          }
-+        if (which_alternative == 2)
-+          return "vmovdqu\t{%1, %t0|%t0, %1}";
-+        else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
-+          return "vmovdqu64\t{%1, %t0|%t0, %1}";
-         else
--          {
--            if (which_alternative == 2)
--              return "vmovdqa\t{%1, %t0|%t0, %1}";
--            else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
--              return "vmovdqa64\t{%1, %t0|%t0, %1}";
--            else
--              return "vmovdqa32\t{%1, %t0|%t0, %1}";
--          }
-+          return "vmovdqu32\t{%1, %t0|%t0, %1}";
-       case MODE_OI:
--        if (misaligned_operand (operands[1], <ssehalfvecmode>mode))
--          {
--            if (which_alternative == 2)
--              return "vmovdqu\t{%1, %x0|%x0, %1}";
--            else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
--              return "vmovdqu64\t{%1, %x0|%x0, %1}";
--            else
--              return "vmovdqu32\t{%1, %x0|%x0, %1}";
--          }
-+        if (which_alternative == 2)
-+          return "vmovdqu\t{%1, %x0|%x0, %1}";
-+        else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
-+          return "vmovdqu64\t{%1, %x0|%x0, %1}";
-         else
--          {
--            if (which_alternative == 2)
--              return "vmovdqa\t{%1, %x0|%x0, %1}";
--            else if (GET_MODE_SIZE (<ssescalarmode>mode) == 8)
--              return "vmovdqa64\t{%1, %x0|%x0, %1}";
--            else
--              return "vmovdqa32\t{%1, %x0|%x0, %1}";
--          }
-+          return "vmovdqu32\t{%1, %x0|%x0, %1}";
-       default:
-         gcc_unreachable ();
-       }
---- a/gcc/config/i386/i386.cc
-+++ b/gcc/config/i386/i386.cc
-@@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size,
-       {
-       case opcode_int:
-         if (scalar_mode == E_HFmode)
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64")
--                    : "vmovdqa64");
-+          opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
-         else
--          opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
-+          opcode = "vmovdqu32";
-         break;
-       case opcode_float:
--        opcode = misaligned_p ? "vmovups" : "vmovaps";
-+        opcode = "vmovups";
-         break;
-       case opcode_double:
--        opcode = misaligned_p ? "vmovupd" : "vmovapd";
-+        opcode = "vmovupd";
-         break;
-       }
-     }
-@@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size,
-       {
-       case E_HFmode:
-         if (evex_reg_p)
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu16"
--                       : "vmovdqu64")
--                    : "vmovdqa64");
-+          opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
-         else
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu16"
--                       : "%vmovdqu")
--                    : "%vmovdqa");
-+          opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
-         break;
-       case E_SFmode:
--        opcode = misaligned_p ? "%vmovups" : "%vmovaps";
-+        opcode = "%vmovups";
-         break;
-       case E_DFmode:
--        opcode = misaligned_p ? "%vmovupd" : "%vmovapd";
-+        opcode = "%vmovupd";
-         break;
-       case E_TFmode:
-         if (evex_reg_p)
--          opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
-+          opcode = "vmovdqu64";
-         else
--          opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
-+          opcode = "%vmovdqu";
-         break;
-       default:
-         gcc_unreachable ();
-@@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size,
-       {
-       case E_QImode:
-         if (evex_reg_p)
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu8"
--                       : "vmovdqu64")
--                    : "vmovdqa64");
-+          opcode = TARGET_AVX512BW ? "vmovdqu8" : "vmovdqu64";
-         else
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu8"
--                       : "%vmovdqu")
--                    : "%vmovdqa");
-+          opcode = TARGET_AVX512BW ? "vmovdqu8" : "%vmovdqu";
-         break;
-       case E_HImode:
-         if (evex_reg_p)
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu16"
--                       : "vmovdqu64")
--                    : "vmovdqa64");
-+          opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
-         else
--          opcode = (misaligned_p
--                    ? (TARGET_AVX512BW
--                       ? "vmovdqu16"
--                       : "%vmovdqu")
--                    : "%vmovdqa");
-+          opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
-         break;
-       case E_SImode:
-         if (evex_reg_p)
--          opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
-+          opcode = "vmovdqu32";
-         else
--          opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
-+          opcode = "%vmovdqu";
-         break;
-       case E_DImode:
-       case E_TImode:
-       case E_OImode:
-         if (evex_reg_p)
--          opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
-+          opcode = "vmovdqu64";
-         else
--          opcode = misaligned_p ? "%vmovdqu" : "%vmovdqa";
-+          opcode = "%vmovdqu";
-         break;
-       case E_XImode:
--        opcode = misaligned_p ? "vmovdqu64" : "vmovdqa64";
-+        opcode = "vmovdqu64";
-         break;
-       default:
-         gcc_unreachable ();